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Disclaimer:
Product specifications on the website are for reference only, subject to the latest manufacturer-confirmed datasheet. Please contact us for official technical documents before project evaluation and quotation.
Operating system, BSP, drivers and SDK vary by hardware batch. Please contact us for official software compatibility documents before project development.
FMC ADC/DAC Cards
Integrated full-duplex FMC transceiver cards combining high-speed ADC and DAC in a rugged compact form factor. Built for defense, aerospace and real-time SIGINT/SDR systems operating in extreme conditions.
All FMC mezzanine cards comply with standard FMC interfaces and are compatible with upcoming carrier boards and development platforms.
Below is a summary of key specifications to help you select the right model quickly.
Product Selection Table
Part Number | Function Type | FMC Standard | Form Factor | Channel Count | Resolution | Sampling Rate | Port | FMC Connector | Temp. Range |
| EL11FMC02A005 | ADC+DAC | FMC1.0 (VITA 57.1) | Single Width | 2 ADC, 2 DAC | 14-bit ADC, 16-bit DAC | 1 GSPS ADC, 2.25GSPS DAC | SSMA*6 | HPC | -40℃～ +85℃ |
| EL11FMC02A006 | ADC+DAC | FMC1.0 (VITA 57.1) | Single Width | 2 ADC, 2 DAC | 16-bit ADC, 16-bit DAC | 1 GSPS ADC, 1.25GSPS DAC | SSMA*6 | HPC | -40℃～ +85℃ |
| EL11FMC02A008 | ADC+DAC | FMC1.0 (VITA 57.1) | Single Width | 4 ADC, 4 DAC | 16-bit ADC, 16-bit DAC | 1 GSPS ADC, 1.25GSPS DAC | SSMA*10 | HPC | -40℃～ +85℃ |
| EL11FMC02A009 | ADC+DAC | FMC1.0 (VITA 57.1) | Single Width | 2 ADC, 2 DAC | 14-bit ADC, 16-bit DAC | 3 GSPS ADC, 12.8 GSPS DAC | SSMA*6 | HPC | -40℃～ +85℃ |
| EL11FMC02A012 | ADC+DAC | FMC1.0 (VITA 57.1) | Dual Width | 8 ADC, 8 DAC | 14-bit ADC, 16-bit DAC | 1.3 GSPS ADC, 2.8 GSPS DAC | SSMC*19 | HPC+ HPC | -40℃～+85℃ |
| EL11FMC02A013 | ADC+DAC | FMC1.0 (VITA 57.1) | Single Width | 2 ADC, 2 DAC | 14-bit ADC, 16-bit DAC | 3 GSPS ADC, 12.6 GSPS DAC | SSMA*6 | HPC | -40℃～+85℃ |
Product No.: EL11FMC02A005
2-Channel 14-Bit 1 GSPS ADC & 2-Channel 16-Bit 2.25 GSPS DAC FMC Mezzanine Card
Key Features
EL11FMC02A005 FMC mezzanine card integrates AD9680 ADC (2 channels, 14-bit, 1 GSPS sampling rate), delivering 80 dBc SFDR, 61.4 dBFS SNR, 1.65 W/ch max power consumption. Equipped with AD9152 DAC (2 channels, 16-bit, up to 2.25 GSPS update rate). Powered by HMC7044 clock IC, featuring ultra-low jitter and multi-output clock distribution.
Specifications
| ADC Specifications | |||||||||
| Model: | AD9680 | ||||||||
| Channels/Resolution: | 2 ch, 14-bit | ||||||||
| Max Sampling Rate: | 1.25 GSPS | ||||||||
| Analog Input Bandwidth: | 2 GHz full-power | ||||||||
| Input Range: | 1.7 Vpp | ||||||||
| SFDR: | 85 dBFS @ 340 MHz, 80 dBFS @ 1 GHz | ||||||||
| SNR: | 63 dBFS @ 340 MHz, 61.4 dBFS @ 1 GHz | ||||||||
| ENOB: | 10.8 bits @ 10 MHz | ||||||||
| DAC Specifications | |||||||||
| Model: | AD9152 | ||||||||
| Channels/Resolution: | 2 ch, 16-bit | ||||||||
| Max Update Rate: | 2.25 GSPS | ||||||||
| Integrated digital inverse sinc & programmable FIR filter | |||||||||
| SFDR: | 72 dBc @ 150 MHz IF, –6 dBFS | ||||||||
| Optional interpolation ratios: | 1×, 2×, 4×, 8× | ||||||||
| Clock Specifications | |||||||||
| Clock Management IC: | HMC7044 | ||||||||
| General Specifications | |||||||||
| Form Factor: | Standard FMC, fully compliant with VITA 57.1 | ||||||||
| Board Dimensions: | 84.1 × 69 mm | ||||||||
| Temp: | –40 °C to +85 °C | ||||||||
Block Diagram
Applications
Software Defined Radio (SDR), Radar Systems, Communications Equipment, Test & Measurement Instruments
Ordering
| PN: | EL11FMC02A005 | ||||||||
| Lead time: | Inquire for official quotation | ||||||||
| Custom designs: | Available upon request | ||||||||
| Support: | FPGA reference design, schematic review, driver development (quoted separately) | ||||||||
Product No.: EL11FMC02A006
2-Channel 16-Bit 1 GSPS ADC & 2-Channel 16-Bit 1.25 GSPS DAC FMC Mezzanine Card
Key Features
This is a high-performance FMC mezzanine card integrating 2-channel 16-bit 1 GSPS ADC and 2-channel 16-bit 1.25 GSPS DAC. Onboard HMC7044 clock IC generates all clocks for JESD204B operation. Supports synchronization and trigger functions with SSMC RF connectors for analog I/O. Designed for multicarrier communications, radar, smart antennas, test & measurement and SDR.
Specifications
| ADC Specifications | |||||||||
| Model: | ADS54J60 (compatible with ADS54J69) | ||||||||
| Channels/Resolution: | 2 channels, 16-bit | ||||||||
| Max Sampling Rate: | 1 GSPS | ||||||||
| Noise Floor: | –159 dBFS/Hz | ||||||||
| 3dB input bandwidth: | 1.2 GHz | ||||||||
| Channel isolation: | 100 dBc @ 170 MHz | ||||||||
| 8-lane JESD204B | |||||||||
| DAC Specifications | |||||||||
| Model: | DAC38J82 | ||||||||
| Resolution: | 16-bit | ||||||||
| Maximum Sampling Rate: | 2.5 GSPS | ||||||||
| Analog bandwidth: | 4.5 MHz–2 GHz | ||||||||
| AC-coupled | |||||||||
| 8-lane JESD204B | |||||||||
| Max input data rate: | 1.23 GSPS | ||||||||
| Clock Specifications | |||||||||
| Management IC: | HMC7044 | ||||||||
| Onboard/external clock reference, software-selectable | |||||||||
| General Specifications | |||||||||
| Analog I/O: | SSMC connectors | ||||||||
| Form Factor: | FMC VITA 57.1 compliant | ||||||||
| Internal/external trigger | |||||||||
| Dimensions: | 84.1 × 69 mm | ||||||||
| Temp: | –40 °C to +85 °C | ||||||||
Block Diagram
Applications
Multicarrier Communications, Radar & Smart Antenna Systems, Test & Measurement, Software-Defined Radio (SDR)
Ordering
| PN: | EL11FMC02A006 | ||||||||
| Lead time: | Inquire for official quotation | ||||||||
| Custom designs: | Available upon request | ||||||||
| Support: | FPGA reference design, schematic review, driver development (quoted separately) | ||||||||
Product No.: EL11FMC02A008
4-Channel 16-Bit 1 GSPS ADC & 4-Channel 16-Bit 1.25 GSPS DAC FMC Mezzanine Card
Key Features
This is a high-performance FMC mezzanine card integrating 4-channel 16-bit 1 GSPS ADC and 4-channel 16-bit 1.25 GSPS DAC. Onboard HMC7044 clock IC generates all required clocks for JESD204B operation. Supports synchronization and trigger functions with SSMC RF connectors for analog I/O.
Specifications
| ADC Specifications | |||||||||
| Model: | ADS54J60 | ||||||||
| 4 channels, 16-bit, 1 GSPS | |||||||||
| Noise Floor: | –159 dBFS/Hz | ||||||||
| 3dB input bandwidth: | 1.2 GHz | ||||||||
| Channel isolation: | 100 dBc @ 170 MHz | ||||||||
| 8-lane JESD204B high-speed serial interface | |||||||||
| DAC Specifications | |||||||||
| Model: | DAC39J84 | ||||||||
| 16-bit, 4 channels, max 2.8 GSPS | |||||||||
| AC-coupled | |||||||||
| 8-lane JESD204B high-speed serial interface | |||||||||
| Max input data rate: | 1.25 GSPS | ||||||||
| Clock Specifications | |||||||||
| Clock IC: | HMC7044 | ||||||||
| Onboard/external clock reference, software-selectable | |||||||||
| General Specifications | |||||||||
| Analog I/O: | 10× SSMC | ||||||||
| Form Factor: | FMC VITA 57.1 compliant | ||||||||
| Internal/external trigger supported | |||||||||
| Dimensions: | 84.1 × 69 mm | ||||||||
| Temp: | –40 °C to +85 °C | ||||||||
Block Diagram
Applications
Multicarrier Communications, Radar & Smart Antenna Systems, Test & Measurement Instrumentation, Software-Defined Radio (SDR)
Ordering
| PN: | EL11FMC02A008 | ||||||||
| Lead time: | Inquire for official quotation | ||||||||
| Custom designs: | Available upon request | ||||||||
| Support: | FPGA reference design, schematic review, driver development (quoted separately) | ||||||||
Product No.: EL11FMC02A009
2-Channel 14-Bit 3 GSPS ADC & 2-Channel 16-Bit 12.8 GSPS DAC FMC Mezzanine Card
Key Features
This is a high-performance FMC mezzanine card integrating 2-channel 14-bit 3 GSPS ADC and 2-channel 16-bit 12.8 GSPS DAC. Onboard HMC7044 clock IC generates all clocks for JESD204B high-speed interface. Supports synchronization/trigger; analog I/O via SSMC RF connectors.
Specifications
| ADC Performance | |||||||||
| Model: | ADS9208 (pin-to-pin compatible with AD9689) | ||||||||
| 2 Channels, 14-bit, 3 GSPS | |||||||||
| Full-power analog bandwidth: | 9 GHz | ||||||||
| Channel isolation: | 100 dBc @ 170 MHz | ||||||||
| 8-lane JESD204B | |||||||||
| DAC Performance | |||||||||
| Model: | AD9172 (compatible with AD9173) | ||||||||
| 2 Channels, 16-bit, max 12.8 GSPS | |||||||||
| Each RF DAC integrates 3 bypassable multiplexed data input channels | |||||||||
| 8-lane JESD204B | |||||||||
| Max SERDES line rate: | 15.4 Gbps | ||||||||
| Clock Performance | |||||||||
| Model: | HMC7044 | ||||||||
| Onboard/external clock reference, software-selectable | |||||||||
| General Specifications | |||||||||
| Analog I/O: | 6× SSMC | ||||||||
| Form Factor: | FMC VITA 57.1 compliant | ||||||||
| Internal/external trigger supported | |||||||||
| Dimensions: | 84.1 × 69 mm | ||||||||
| Temp: | -40 °C to +85 °C | ||||||||
Block Diagram
Applications
Wireless Communications Infrastructure, Multiband Base Station Radios, Instrumentation, Automatic Test Equipment (ATE), Radar and Jamming Systems
Ordering
| PN: | EL11FMC02A009 | ||||||||
| Lead time: | Inquire for official quotation | ||||||||
| Custom designs: | Available upon request | ||||||||
| Support: | FPGA reference design, schematic review, driver development (quoted separately) | ||||||||
Product No.: EL11FMC02A012
Dual-Width 8-Channel 14-Bit 1.3 GSPS ADC & 8-Channel 16-Bit 2.8 GSPS DAC FMC Mezzanine Card
Key Features
4 dual-channel 14-bit 1.3 GSPS JESD204B ADCs (AD9695) + 2 quad-channel 16-bit 2.8 GSPS JESD204B DACs (AD9144). Dual-wide FMC HPC, ANSI/VITA 57.1 compliant, ENIG PCB finish. Onboard OCXO & JESD204B PLL clock sync/distribution. SSMC connectors for analog I/O; supports external clock and trigger I/O.
Specifications
| ADC Performance | |||||||||
| 4 dual-channel (AD9695BCPZ-1300), 1.3 GSPS, 14-bit | |||||||||
| Input 500 kHz–500 MHz (AC-coupled RF transformers) | |||||||||
| Max input 2 Vpp (50 Ω) | |||||||||
| JESD204B, 4 lanes/device, up to 16 Gbps lane rate | |||||||||
| DAC Performance | |||||||||
| 2 Quad-channel (AD9144BCPZ), 2.8 GSPS, 16-bit | |||||||||
| Output 5 MHz–1200 MHz (AC-coupled RF transformers) | |||||||||
| Nominal output -6 dBm (50 MHz CW, 50 Ω) | |||||||||
| JESD204B, 8 lanes/device, up to 15 Gbps lane rate | |||||||||
| Clock Performance | |||||||||
| Onboard 25 MHz low-phase-noise OCXO (0.1 ppm temp stability) | |||||||||
| External reference supported; LMK04828 JESD204B clock device | |||||||||
| General Specifications | |||||||||
| Channel isolation ≥80 dB (transmit/receive groups) | |||||||||
| Amplitude matching ≤0.4 dB, phase matching ≤2° (50 MHz CW) | |||||||||
| Dual-wide FMC HPC, supports channel-split with single-wide FMC HPC carrier | |||||||||
| Active heatsink/fan, segmented shielding | |||||||||
Block Diagram
Applications
SDR, EW, spectrum monitoring, signal intelligence, DBF/phased array radar, wideband radar acquisition/waveform generation, 5G/6G prototyping, massive MIMO test, high-speed data record/playback, RF test & measurement, satellite communication, industrial inspection.
Ordering
| PN: | EL11FMC02A012 | ||||||||
| Lead time: | Inquire for official quotation | ||||||||
| Custom designs: | Available upon request | ||||||||
| Support: | FPGA reference design, schematic review, driver development (quoted separately) | ||||||||
Product No.: EL11FMC02A013
2-Channel 14-Bit 3 GSPS ADC & 2-Channel 16-Bit 12.6 GSPS DAC FMC Mezzanine Card
Key Features
2-Channel 14-bit A/D (3.0/2.6/2.0 GSPS, configurable); 2-Channel 16-bit D/A (12.6 GSPS); Full-power analog input bandwidth (-3 dB) up to 9 GHz. Trigger I/O, 3 clock modes (internal/external reference, external clock). Clock via SPI; multi-board sync via common reference. ANSI/VITA 57.1 compliant. FPGA interface: single HPC connector. Front-panel: 6 SSMC. Air/conduction-cooled; compatible with standard carriers for high-performance/real-time signal processing.
Specifications
| Connectors: | 6 SSMC (2 AD0/AD1, 2 DA0/DA1, 1 CLK, 1 TRG) | ||||||||
| 2-ch 16-bit 12.6 GSPS DAC | |||||||||
| 2-ch 14-bit 2.6 GSPS ADC | |||||||||
| Digital Interface: | JESD204B (ADC/DAC) | ||||||||
| Compliance: | ANSI/VITA 57.1 | ||||||||
| Thermal: | Air/conduction-cooled | ||||||||
| Analog I/O: | AC coupling | ||||||||
| Clock: | Internal/external (carrier-configurable) | ||||||||
| Interface: | HPC | ||||||||
| Dimensions | 69×85 mm | ||||||||
| Weight: | 37g (bare); 83g (assembled) | ||||||||
| Temp: | Commercial (0~70°C); Industrial (-40~85°C) | ||||||||
Block Diagram
Applications
SDR, Wideband MIMO, DBF, EW (Radar/Sonar), Physics Experimentation, SIGINT, Aerospace Systems, Test & Measurement Instruments
Ordering
| PN: | EL11FMC02A013 | ||||||||
| Lead time: | Inquire for official quotation | ||||||||
| Custom designs: | Available upon request | ||||||||
| Support: | FPGA reference design, schematic review, driver development (quoted separately) | ||||||||
Contact: Windy Lian
Phone: 13862120662
E-mail: sales@north-bridges.com
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Add: Suzhou City, China
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