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Disclaimer:
All product specifications published on this website are for reference only and shall be subject to the latest manufacturer‑confirmed datasheet. Please contact us for official technical documents prior to project evaluation and quotation.
Operating‑system, BSP, driver and SDK versions may vary across hardware production batches. Please consult us for official software compatibility documents before starting project development.
VPX I/O & Interface Boards
Our 3U/6U VPX I/O & Interface Boards provide rugged, high-reliability signal interconnection, data acquisition and peripheral expansion for modular embedded systems. The family includes FPGA I/O, high-speed acquisition, timing modules, XMC carriers, RTM rear I/O and dedicated front-end driver & sensing boards. VITA-compliant, with air/conduction cooling, wide-temperature operation and optional health monitoring for aerospace, transport, industrial and test & measurement systems.
VPX I/O & Interface Boards | Selection Table
| Part Number | Form Factor | Core Chip | I/O Front Panel | I/O Backplane | Bandwidth / Max Throughput | Cooling Support | Power Consumption | Operating Temp | Compatibility Notes |
| EL12PRCA7A001 | 6U OpenVPX | 2× XC7V690T FPGA | 2× FMC HPC | RapidIO | 710MB/s@2.5G, 920MB/s@3.125G, 1400MB/s@5G | Conduction / Air Cooling | ≤50W | -40℃ ~ +70℃ | OpenVPX compliant, dual FPGA architecture for high-speed real-time signal processing |
| EL12PRCA7A002 | 6U OpenVPX | XC6VSX315T FPGA, 2× EV10AQ190A ADC | 4× SMP, 1× FMC HPC | RapidIO 4×5G | Up to 20Gbps | Conduction / Air Cooling | ≤60W | N/A | VITA65 compliant, high-speed RF data acquisition architecture, optional TMS320C6678 DSP onboard |
| EL12PRCA7A003 | 6U OpenVPX | XC7K325T FPGA | 1×GbE RJ45, 1×RS232 debug, 8×J30J RS422, JTAG | 4×SRIO@P1, 4×PCIe@P2, 16×RS422@P3 ,64×LVDS@P4/P5, 1×GbE@P4 | SRIO 3.125G | Conduction / Air Cooling | N/A | 0℃~+50℃ / -40℃~+85℃ | OpenVPX compliant, system integration assessment required |
| EL12PRCA7A004 | 6U VPX | 2× Cyclone IV FPGA | 1× RS232 (IPMI debug); 8 status LEDs | 2×PCIe x1 Gen2;1×adjustable RS232/422;8×RS485;4×RS422;4×isolated GPO;4×isolated GPI;4×trigger isolated GPI;1×CAN2.0B;1×PPS | Up to 2×5Gbps | Conduction / Air Cooling | 10~15W | -25℃ ~ +70℃ / -40℃ ~ +85℃ | VITA46 compliant, on-board health monitoring & fault reporting, multi-OS support |
| EL12PRCA7A005 | 6U VPX | XC7S6 FPGA | 5×SMA PPS/GPIO; 10×LVDS; 5×RS422 B-code; J30J 11×3.3V GPIO; Type-C JTAG | VPX P1, P2 | JESD204B clock out, channel skew <120ps | Air cooling | N/A | N/A | OpenVPX compliant, system integration assessment required |
| EL12PRCA7A006 | 6U VPX | XC7S50 FPGA | 4×J30J | VPX P0, P6 | N/A | Air cooling | ≤0.4W | -10℃ ~ +60℃ | OpenVPX compliant, system integration assessment required |
| EL12PRCA7A007 | 6U VPX | Actel A3PE3000L FPGA | 3×J30J, 2×RS422, 2×RS232 | VPX P0, P6 | N/A | Air cooling | 12V DC, 3A | -30℃~+55℃ / -40℃~+85℃ | OpenVPX compliant, system integration assessment required |
| EL12PRCA7A008 | 6U VPX | PCIe Switch | N/A | PCIe3.0 ×8 uplink@P1; XMC1→P2; XMC2→P6 | 16GB/s bidirectional | Conduction / Air Cooling | N/A | -40℃ ~ +70℃ | VITA46/VITA65/VITA46.9 compliant, dual XMC slots with DMA peer-to-peer transfer |
| EL12PRCA7A009 | 6U VPX RTM (4HP/5HP) | N/A | 4×GbE RJ45, 2×DP, 1×VGA, 2×USB3.0, 1×RS232 | VPX connector, 1×miniPCIe, on-board eDP, 3×USB2.0, 3×RS232/422/485, M.2 | 1Gbps per GbE port | Passive, Wide Temp | N/A | -40℃ ~ +85℃ | Dedicated RTM board, only compatible with Weikong VPX mainboard, cannot operate standalone |
| EL12PRCA7A010 | 3U VPX | Embedded DSP | 1×3G-HD-SDI in,1×SDI out,1×CVBS out,Analog audio I/O,1×GbE | N/A | GbE | Fanless all-aluminum cooling | N/A | N/A | OpenVPX compliant, system integration assessment required |
| EL12PRCA7A011 | 3U VPX VITA46 /VITA65 /VITA42.3 /VITA46.9 | N/A | N/A | PCIe3.0 ×8@P1; configurable P2 for XMC | PCIe3.0 ×8 | Conduction / Air Cooling | N/A | -40℃ ~ +70℃ | VITA46/VITA65/VITA42.3/VITA46.9 compliant, optional IPMC management |
PN.: EL12PRCA7A001
6U OpenVPX Dual Virtex‑7 FPGA Board, Dual HPC FMC Expansion for Real-Time High-Speed Signal Processing
Specifications
| Form Factor | 6U OpenVPX | ||||||||
| Core Chip | FPGA: 2×XC7V690T | ||||||||
| Onboard Memory | Per FPGA: 2×64bit DDR3 | ||||||||
| Total 8GB /16GB | |||||||||
| RapidIO Throughput | 710MB/s @2.5Gbps | ||||||||
| 920MB/s @3.125Gbps | |||||||||
| 1400MB/s @5Gbps | |||||||||
| Expansion I/O | 2×HPC FMC | ||||||||
| Operating Temp | -40℃ ~ +70℃ | ||||||||
| Power Consumption | ≤50W | ||||||||
| Cooling | Conduction / Air Cooling | ||||||||
Block Diagram
PN.: EL12PRCA7A002
6U OpenVPX VITA65 5Gsps High-Speed RF Digitization Board with RapidIO Interlink & FMC-HPC Expansion
Specifications
| Form Factor | 6U OpenVPX, VITA65 | ||||||||
| Core Chip | FPGA: XC6VSX315T | ||||||||
| ADC: 2×EV10AQ190A | |||||||||
| Onboard Memory | 2GB DDR3 | ||||||||
| Inter-board Link | RapidIO 4×5Gbps | ||||||||
| Front Interface | SMP: 4×ADC, 1×trigger,1×clock input; | ||||||||
| 1×FMC HPC | |||||||||
| Power Consumption | ≤60W | ||||||||
| Cooling | Conduction / Air Cooling | ||||||||
Block Diagram
PN.: EL12PRCA7A003
6U OpenVPX Kintex‑7 FPGA Board with IPMB Health Monitoring, Multi-Channel Differential I/O and SRIO/PCIe High-Speed Interconnect
Specifications
| Form Factor | 6U OpenVPX | ||||||||
| Core Chip | FPGA: XC7K325T | ||||||||
| Front Panel | 1×1000Base-T RJ45 | ||||||||
| 1×RJ45 RS232 debug | |||||||||
| 8CH J30J RS422 | |||||||||
| JTAG | |||||||||
| VPX Backplane Interfaces | ×4 SRIO @P1, 3.125Gbps | ||||||||
| ×4 PCIe @P2 | |||||||||
| 16CH RS422 @P3 | |||||||||
| 64CH LVDS @P4/P5 | |||||||||
| 1000Base-T shared on P4 | |||||||||
| Health Management | IPMB bus, voltage / temperature / self-test monitoring | ||||||||
| Operating Temp | 0℃~+50℃ / -40℃~+85℃ | ||||||||
| Cooling | Conduction / Air Cooling | ||||||||
Block Diagram
PN.: EL12PRCA7A004
6U VPX Dual Intel Cyclone IV FPGA Module, Isolated Multi-Channel Signal Access with PCIe Bus, Multi-OS Support and Health Monitoring
Specifications
| Form Factor | 6U VPX | ||||||||
| Core Chip | FPGA: 2× Cyclone IV | ||||||||
| Bus | 2×PCIe ×1 Gen2 | ||||||||
| Front Panel | 1×RS232 (IPMI debug only), 8 status LEDs | ||||||||
| Rear I/O | 1×RS232/RS422 adaptive | ||||||||
| 8×RS485 | |||||||||
| 4×RS422 | |||||||||
| 4×isolated GPO | |||||||||
| 4×isolated GPI | |||||||||
| 4×trigger‑capable GPI | |||||||||
| 1×CAN2.0B (CAN2.0A compatible) | |||||||||
| 1×PPS input | |||||||||
| UART | 16C550 compatible | ||||||||
| Supported OS | DOS, Windows, Linux, VxWorks, QNX | ||||||||
| Power | +3.3V_AUX, +12V | ||||||||
| Power Consumption | 10‑15W (FPGA‑load dependent) | ||||||||
| Cooling | Conduction / Air Cooling | ||||||||
| Operating Temp | -25℃ ~ +70℃ / -40℃ ~ +85℃ | ||||||||
| FunctionBoard health monitoring & fault reporting | |||||||||
Block Diagram
PN.: EL12PRCA7A005
6U VPX XC7S6 Timing Controller, JESD204B Clock Output, Ultra Low Skew Trigger for Synchronous Multi-Channel Acquisition
Specifications
| Form Factor | 6U VPX | ||||||||
| Core Chip | FPGA: XC7S6 | ||||||||
| Onboard Memory | 256Mb QSPI Flash, 4bit | ||||||||
| Trigger Input | SMA, LVCMOS/LVTTL | ||||||||
| 6 differential trigger out to VPX P2 | |||||||||
| Skew <30ps | |||||||||
| Clock Input | External reference / sampling / sync clock ≤200MHz | ||||||||
| Clock Output | 7 groups JESD204B clock (SYSREF+DCLK) to VPX P1 | ||||||||
| Skew <120ps | |||||||||
| Front Panel I/O | 5× SMA PPS/GPIO | ||||||||
| 10CH LVDS | |||||||||
| 5CH RS422 B-code | |||||||||
| J30J 11CH 3.3V GPIO | |||||||||
| Debug Interface | 6-pin JTAG header, Type‑C JTAG | ||||||||
| VPX Connector | P1,P2 | ||||||||
Block Diagram
PN.: EL12PRCA7A006
6U VPX Multi-Channel Programmable Bias & Pulse Driver, Dedicated Detector Front-End, Integrated Power Telemetry for Imaging Acquisition Systems
Specifications
| Form Factor | 6U VPX | ||||||||
| Core Chip | FPGA: XC7S50 | ||||||||
| Onboard Memory | 4Gbit DDR3,128Mb QSPI FLASH | ||||||||
| Detector Power Channel | 10CH，0~5V，≤300mA per channel，Noise ≤0.2mVrms | ||||||||
| Bias Voltage Channel | 16CH，0~5V TTL，≤50mA per channel，Noise ≤0.1mVrms | ||||||||
| Working Pulse Channel | 32CH，0~5V programmable，Max 100MHz | ||||||||
| Sync Signal | 16CH，3.3V level | ||||||||
| Power Input | 12V DC | ||||||||
| Power Consumption | ≤0.4W | ||||||||
| External Connectors | VPX P0(1410189-1),P6(1410187-3); J30J-37ZKW,J30J-25ZKW,J30J-21ZKW,J30J-15ZKW | ||||||||
| Dimension | 233.35(L) ×160(W) mm | ||||||||
| Operating Temp | -10℃ ~ +60℃ | ||||||||
Block Diagram
PN.: EL12PRCA7A007
6U VPX Multi-Channel High Precision Temperature Sensing Board, Companion for Detector & Imaging Front-End, 24CH Temperature Acquisition with Local & Remote Alarm
Specifications
| Form Factor | 6U VPX | ||||||||
| Core Chip | FPGA: Actel A3PE3000L | ||||||||
| Aux MCU: STM32F103 | |||||||||
| Total Temp. Channels | 24CH | ||||||||
| PT100 4-wire | 10CH | ||||||||
| MF51 2-wire | 10CH | ||||||||
| Measuring Range | ‑200℃ ~ +600℃ | ||||||||
| Sampling Cycle | <1s | ||||||||
| Power Input | 12V DC,3A, ripple ≤10% | ||||||||
| Communication | RS422 ×2; | ||||||||
| RS232 ×2; | |||||||||
| GSM/GPRS remote module | |||||||||
| External Connectors | VPX P0 (1410189-1) | ||||||||
| VPX P6 (1410187-3) | |||||||||
| J30JA-51ZKW-J | |||||||||
| J30JA-21ZKW-J | |||||||||
| J30JA-9ZKW-J | |||||||||
| Dimension | 233.35(L) ×160(W) mm | ||||||||
| Operating Temp | -30℃~+55℃ / -40℃~+85℃ | ||||||||
Block Diagram
PN.: EL12PRCA7A008
6U VPX Dual-XMC Carrier Board, PCIe3.0 High-Speed Switch Architecture with DMA Peer-to-Peer Transfer, High-Reliability Rugged Expansion Platform
Specifications
| Form Factor | 6U VPX, 4HP/5HP | ||||||||
| Core Chip | N/A | ||||||||
| Standards | VITA46 | ||||||||
| VITA65 | |||||||||
| MOD3-PAY-2F2U-16.2.3-6 | |||||||||
| XMC Spec | VITA46.9 compatible | ||||||||
| PCIe Interface | PCIe3.0 ×8 uplink @VPX P1 | ||||||||
| 2×PCIe3.0 ×8 to XMC1/XMC2 | |||||||||
| Backplane Routing | XMC1 routed to P2 | ||||||||
| XMC2 routed to P6 | |||||||||
| P2w1‑X24s+X8d+X12d | |||||||||
| Bandwidth | Max bidirectional 16GB/s, PCIe switch supports DMA | ||||||||
| Cooling | Conduction / Air Cooling | ||||||||
| Operating Temp | -40℃ ~ +70℃ | ||||||||
| Weight | ≤200g | ||||||||
| MTBF | ≥200,000h | ||||||||
Block Diagram
PN.: EL12PRCA7A009
6U VPX Wide-Temperature RTM Rear I/O Board, Dedicated Matching Mainboard, Integrated Ethernet, Multi-Display, USB, Serial and M.2 Storage Interfaces
Specifications
| Form Factor | 6U VPX RTM, 4HP/5HP | ||||||||
| Core Chip | N/A | ||||||||
| Connector | VPX connector | ||||||||
| Ethernet | 4×GbE RJ45 | ||||||||
| Display | Panel: 2×DP, 1×VGA | ||||||||
| 1×on-board EDP | |||||||||
| miniPCIE | 1×miniPCIE | ||||||||
| USB | Panel: 2×USB3.0 | ||||||||
| On-board:3×USB2.0 | |||||||||
| Serial Port | Panel: 1×RS232 | ||||||||
| On-board: 3×RS232/422/485 | |||||||||
| Onboard Memory | 2×M.2 | ||||||||
| Operating Temp | -40℃ ~ +85℃ | ||||||||
| Weight | 0.2kg | ||||||||
Block Diagram
PN.: EL12PRCA7A010
3U VPX Embedded DSP Video Processing Board, Supporting 16-CH H.265 Decoding & Multi-Channel Encoding, Multi-Protocol Streaming Transcoding for Embedded Systems
Specifications
| Form Factor | 3U VPX | ||||||||
| Core Chip | Embedded DSP hardware | ||||||||
| Media Processing | 16×H.265 decode | ||||||||
| Multi-channel encode | |||||||||
| Video/Audio Format/Bitrate/Resolution/Framerate Conversion | |||||||||
| Interfaces | 1×3G/HD-SDI Input | ||||||||
| 1×SDI Output | |||||||||
| 1×CVBS Output | |||||||||
| Analog Audio I/O | |||||||||
| 1×GbE | |||||||||
| Network Protocols | RTSP,RTMP,ONVIF,SIP,TS | ||||||||
| Bypass / Transcoding Dual Mode | |||||||||
| Extra Functions | OSD Overlay | ||||||||
| Video Cropping Encoding | |||||||||
| Local Capture Stream Output | |||||||||
| System | Linux OS | ||||||||
| 7×24h Continuous Operation | |||||||||
| Custom Support | |||||||||
| Cooling | Fanless all-aluminum cooling | ||||||||
Block Diagram
PN.: EL12PRCA7A011
3U VPX Compact XMC Carrier Board, PCIe3.0 High-Speed Bus Adaptation, Flexible Channel Configuration and Optional IPMC Management for Rugged Embedded Systems
Specifications
| Form Factor | 3U VPX, 4HP/5HP | ||||||||
| Core Chip | N/A | ||||||||
| Standards | VITA46 | ||||||||
| VITA65 | |||||||||
| VITA42.3 | |||||||||
| MOD3-PAY-2F2U-16.2.3-2/3 and multiple profile | |||||||||
| XMC Spec | Jn5: VITA42.3 | ||||||||
| Jn6: VITA46.9 profile P2w1-X24s+X8d+X12d | |||||||||
| Jn4: VITA46.9 profile P2w1-P64s | |||||||||
| PCIe Link | PCIe3.0 ×8 (×1/×2/×4/×8 configurable) | ||||||||
| VPX P1 ↔ XMC Jn5 | |||||||||
| VPX Backplane Profile | Optional1: P2w1‑X24s+X8d+X12d | ||||||||
| Optional2: P2w1‑P64s | |||||||||
| System Management | Integrated IPMC | ||||||||
| Voltage/Temp Monitor | |||||||||
| Power & Reset Control | |||||||||
| Cooling | Conduction / Air Cooling | ||||||||
| Operating Temp | ‑40℃ ~ +70℃ | ||||||||
| Weight | ≤200 g | ||||||||
| MTBF | ≥200 000 hours | ||||||||
Block Diagram
Contact: Windy Lian
Phone: 13862120662
E-mail: sales@north-bridges.com
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Add: Suzhou City, China
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